› Modularity of mixserver security proofs in the CCSA logic: case of Bayer-Groth protocol - Margot Catinaud, Laboratoire Méthodes Formelles
10:30-11:00 (30min)
› Interactive Proofs in Higher-Order Logic with Errors and Application to Concrete Cryptography - Théo Vignon, Laboratoire Méthodes Formelles
11:00-11:30 (30min)
› aLEAKator: HDL Mixed-Domain Simulation for Masked Hardware & Software Formal Verification - Noé Amiot, Architecture et Logiciels pour Systèmes Embarqués sur Puce
14:00-14:30 (30min)
› Aiming for a low-overhead AddressSanitizer: repurposing Intel Processor Tracing and associated guarantees - Antonin Reitz, Inria Paris
14:30-15:00 (30min)
› Design and Formal Verification of Hardware/Software Security - Leslie Fifanon, Institut de Recherche en Informatique et Systèmes Aléatoires, Centrale Supelec - Pierre WILKE, CentraleSupélec, Inria, Univ Rennes, CNRS IRISA, Rennes, France
15:30-16:00 (30min)
› Protections contre l'injection de fautes ajoutées à la compilation formellement vérifiée - Benjamin Gaudin, VERIMAG
16:00-16:30 (30min)